From 18556aeb592dfb50f4ec9a592fb0331ba1412b3e Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Fri, 29 Aug 2008 20:29:58 +0200 Subject: [PATCH] mpc83xx: set gpio level before direction Set gpio level register before direction register to inhibit glitches on high level output pins. Dir and data gets cleared at powerup, so high level output lines see a short low pulse between setting the direction and level registers. Issue was seen on a new board with the nReset line of the NOR flash connected to a GPIO. Setting the direction register puts the NOR flash in reset so the next instruction to set the level cannot get executed. Signed-off-by: Peter Korsgaard --- cpu/mpc83xx/cpu_init.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index 67c9e57..4514dbb 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -283,12 +283,12 @@ void cpu_init_f (volatile immap_t * im) im->sysconf.lblaw[7].ar = CFG_LBLAWAR7_PRELIM; #endif #ifdef CFG_GPIO1_PRELIM - im->gpio[0].dir = CFG_GPIO1_DIR; im->gpio[0].dat = CFG_GPIO1_DAT; + im->gpio[0].dir = CFG_GPIO1_DIR; #endif #ifdef CFG_GPIO2_PRELIM - im->gpio[1].dir = CFG_GPIO2_DIR; im->gpio[1].dat = CFG_GPIO2_DAT; + im->gpio[1].dir = CFG_GPIO2_DIR; #endif } -- 1.5.6.3